define what PCI stands for
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- latency: usually much higher than CPU's ➔ the more parallel threads are run the less the price of high latency is paid (latency "hiding")
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- spatial locality is extremely critical
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- A portion of the GPU-RAM is accessible to the CPU ➔ the GPU performs the copies
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- The PCI-Bus bottleneck: data needs to flow from main (CPU) memory to GPU memory and back!
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- The PCI-Bus (Peripheral Component Interconnect bus) is the bottleneck: data needs to flow from main (CPU) memory to GPU memory and back!
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- Problems on a cluster: the GPU does not really support simultanous multiple users payloads!
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# Computer Architecture (a concrete example)
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- Internal clock 650 MHz, 1.54 ns
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- CAS Latency 34 cycles, Total latency = CAS latency x cycle = 13.09 ns, Throughput 40.6 GB/s
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- DMI (Direct Media Interface): 8×16 GT/s (≈128 GB/s)
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- PCI Express bridges:
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- PCI (Peripheral Component Interconnect) Express bridges:
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- Graphics: 16 GT/s (≈ 8 GB/s)
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- 2× Thunderbolt: 2.5 GT/s (≈ 1 GB/s) and 16 GT/s (≈ 8 GB/s)
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- GPU Intel Iris, Internal clock 300 Mhz-1.30 GHz, memory 4 GB/2.1 GHz with a bandwidth of 68 GB/s
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